SYSCTL_MEMTIM0_EBCHT=SYSCTL_MEMTIM0_EBCHT_0_5, SYSCTL_MEMTIM0_FBCHT=SYSCTL_MEMTIM0_FBCHT_0_5
Memory Timing Parameter Register 0 for Main Flash and EEPROM
| SYSCTL_MEMTIM0_FWS | Flash Wait State |
| RESERVED0 | Value of this reserved bit must be read as 1 |
| SYSCTL_MEMTIM0_FBCE | Flash Bank Clock Edge |
| SYSCTL_MEMTIM0_FBCHT | Flash Bank Clock High Time 0 (SYSCTL_MEMTIM0_FBCHT_0_5): 1/2 system clock period 1 (SYSCTL_MEMTIM0_FBCHT_1): 1 system clock period 2 (SYSCTL_MEMTIM0_FBCHT_1_5): 1.5 system clock periods 3 (SYSCTL_MEMTIM0_FBCHT_2): 2 system clock periods 4 (SYSCTL_MEMTIM0_FBCHT_2_5): 2.5 system clock periods 5 (SYSCTL_MEMTIM0_FBCHT_3): 3 system clock periods 6 (SYSCTL_MEMTIM0_FBCHT_3_5): 3.5 system clock periods 7 (SYSCTL_MEMTIM0_FBCHT_4): 4 system clock periods 8 (SYSCTL_MEMTIM0_FBCHT_4_5): 4.5 system clock periods |
| SYSCTL_MEMTIM0_EWS | EEPROM Wait States |
| RESERVED1 | Value of this reserved bit must be read as 1 |
| SYSCTL_MEMTIM0_EBCE | EEPROM Bank Clock Edge |
| SYSCTL_MEMTIM0_EBCHT | EEPROM Clock High Time 0 (SYSCTL_MEMTIM0_EBCHT_0_5): 1/2 system clock period 1 (SYSCTL_MEMTIM0_EBCHT_1): 1 system clock period 2 (SYSCTL_MEMTIM0_EBCHT_1_5): 1.5 system clock periods 3 (SYSCTL_MEMTIM0_EBCHT_2): 2 system clock periods 4 (SYSCTL_MEMTIM0_EBCHT_2_5): 2.5 system clock periods 5 (SYSCTL_MEMTIM0_EBCHT_3): 3 system clock periods 6 (SYSCTL_MEMTIM0_EBCHT_3_5): 3.5 system clock periods 7 (SYSCTL_MEMTIM0_EBCHT_4): 4 system clock periods 8 (SYSCTL_MEMTIM0_EBCHT_4_5): 4.5 system clock periods |